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Overview of the first firmware for the Odyssey-2 transceiver.

The first firmware for the Odyssey-2 transceiver is based on the source code of the ANAN-10E transceiver and offers basic features similar to the Angelia board of the openHPSDR project.

The connection to the computer is carried out 1 Gigabit Ethernet connection, which prevents   interferences to radio from a network connection. 100Mbit connection with this firmware will not work. If there are problems with the connection, first of all, you should check whether the network card of the computer goes into Gigabit mode. Often, you can enable this mode forcibly, if the card tries to work in 100Mb mode by default. DHCP client implemented in this firmware will automatically configure the necessary network settings, special settings on the computer side do not need. If necessary, you can specify a static IP address for the transceiver using the HPSDRProgrammer program. At this stage, it is not recommended to use this option, because if you forget the specified address, you will not be able to connect to the board and change it.

The firmware features are similar to the capabilities of the Angelia board with support for the new protocol. When using programs, you must select the settings for the ANAN 100D transceiver. At the moment only two programs are known that work with the new protocol — Thetis and SDR_Console V3. You can also note the project G0ORX piHPSDR, designed to run on mini-computers with Linux and a similar project openHPSDR, designed to run on smartphones with Android.

The firmware contains 4 independent receivers, each of which can take a signal from either of the two ADCs. The width of the working spectrum can be adjusted in the range from 48 kHz to 1536 kHz, and unlike the old protocol, the spectrum width can be set different for each receiver. In fact, Thetis uses only two receivers for display and decoding, one receiver is used to operate the PureSignal system (pre-emphasis of the transmission signal) and one receiver is not used. The current version 2.3.11 has errors related to the use of receivers. So, in normal mode, the third and fourth receivers are used for decoding, but if you turn on the Diversity or PureSignal mode, the first and second will be used. This should be taken into account when specifying a working ADC for receivers.

The SDR-Console V3 program in the current version only works with one ADC and does not support Diversity mode. PureSignal mode is available.

The pinout of the external device control connector with this firmware is obtained as follows:

Pin assignment:

ADC1 — input for measurement of the output power of the transmitter
ADC2 — input for measurement of reflected wave for calculating SWR
PTTout — amplifier control output, logic level 3.3 V, TX mode high level
TUNE — not in use at the moment
UO_0 — UO_3 — four User Output lines, the code on which can be set individually for each band from the program
PTT_in is the transmission control input, can be used to connect the pedal. Tighten to a high level, to activate it should be closed to the ground. For electrical isolation, a suitable optocoupler should be used.
VNA — provides a signal to the amplifier, including an integrated measuring bridge for analyzing the complex characteristics of the antenna.
ANT — high level provides a signal to turn on the relay of the second antenna
DATA, CLOCK, EN — serial data bus

As you can see, four control lines can control for example 8 filters and additional HFA, which can be enough for a simple amplifier. You can extend the control capabilities with a serial data bus by connecting two TPIC6B595 decoders to it, as it is done in the ALEX  board used in ANAN transceivers. As a result, we get 16 additional control signals, the power of which is sufficient, for direct control of the relay. Thus, you can make a very simple board similar to ALEX, but the differences in the protocol do not allow you to connect the existing ALEX boards.

16 pins of two decoders allow to connect 16 relays for control according to the table:

Bit          Function            I.C. Output
——       ————           ————
Bit 00 — 160 Meters LPF        U1 — D0
Bit 01 — 80 Meters LPF         U1 — D1
Bit 02 — 60/40 Meters LPF    U1 — D2
Bit 03 — 30/20 Meters LPF    U1 — D3
Bit 04 — 17/15 Meters LPF    U1 — D4
Bit 05 — 12/10 Meters LPF    U1 — D5
Bit 06 — 1.5 MHz HPF           U1 — D6
Bit 07 — 6.5 MHz HPF           U1 — D7
Bit 08 — 9.5 MHz HPF           U2 — D0
Bit 09 — 13 MHz HPF            U2 — D1
Bit 10 — 20 MHz HPF            U2 — D2
Bit 11 — Bypass                    U2 — D3
Bit 12 — 6M Preamp             U2 — D4
Bit 13 — ANT #2                   U2 — D5
Bit 14 — ANT #3                   U2 — D6
Bit 15 — T/R Relay               U2 — D7

The firmware of the microcontroller in the current version does not have a connection to the FPGA and performs the simplest functions using three additional buttons Yaesu MH-31 A8J.

The middle FST button duplicates the power button, the DOWN button turns on / off the 1-watt output driver, the UP button controls the power-on of the audio amplifier. The actions are accompanied by an indication in the display. The states are stored in the energy-independent memory of the microcontroller.

Download firmware sourcecode…

Yahoo group for discussion…

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